Triangle Quantum Computing Seminar Series: SIFT: Subroutine-Inspired Fault-Tolerance

Speaker
Narayanan Rengaswamy, Assistant Professor, Electrical and Computer Engineering, The University of Arizona
ABSTRACT: Conventional approaches to fault-tolerant quantum computing realize logical circuits gate-by-gate, synthesizing each gate independently on one or more code blocks. This incurs excess overhead and doesn't leverage common structures in quantum algorithms. In contrast, we propose a framework that enables the execution of entire logical subroutines at once, preserving their global structure. This SIFTing approach allows for the direct implementation of logical Trotter circuits-of arbitrary rotation angles-on any stabilizer code, providing a powerful new method for fault-tolerant Hamiltonian simulation within a single code block. I will discuss potential approaches to fault-tolerance via biased noise, bias-preserving gates, code concatenation, and algorithmic fault-tolerance. Furthermore, I will also show that any logical quantum circuit can be recompiled as a sequence of Trotter circuits. Hence, by perfecting and iterating these building blocks, our framework enables an exciting new architecture to universal fault-tolerance without magic state distillation or logical measurements. I will illustrate the key principles using an [[8,3,3]] non-CSS code example, and show circuit-level noise simulation results on a lifted product quantum LDPC code.
BIO: Narayanan Rengaswamy is a tenure-track assistant professor of Electrical and Computer Engineering at the University of Arizona. He is also a Co-PI at the NSF-ERC Center for Quantum Networks at the university. Before this, he was a postdoctoral research associate with Bane Vasić in the same department. He completed his Ph.D. at Duke University, under the supervision of Henry Pfister and Robert Calderbank. His dissertation, titled "Classical Coding Approaches for Quantum Applications", focused on fault tolerant quantum computing and communications. He was a Keynote Speaker at the 2024 Fault Tolerant Quantum Technologies Workshop and a co-recipient of two Best Paper Awards in the Quantum Algorithms Track at the 2024 and 2025 IEEE International Conference on Quantum Computing and Engineering for the papers titled "Non-binary hypergraph product codes for qudit error correction" and "Fault Tolerant Quantum Simulation via Symplectic Transvections". He is an Editor at the journal Quantum and was one of two Lead Editors for the 2025 IEEE Journal on Selected Areas in Information Theory Special Issue on Quantum Error Correction and Fault Tolerance. He is a Senior Member of the IEEE and a Member of the AMS.
Categories
Engineering, Natural Sciences, Panel/Seminar/Colloquium